Thread regarding Intel Corp. layoffs

Who is in charge of TMG/TD yield dept?

14nm was 1 year late (low yield).
10nm has been atleast 4 or 5 years late due to very low yields.
7nm is already 2 or 3 years late (again due to poor yield) and even if one goes by current roadmap, would be around 4 to 5 years late compared to original roadmap.

That begs the question - who is the VP responsible for the yield department in TMG or TD?

And why haven't they still been held accountable for these big debacles?

This seems like a no brainer who/where the issue is.

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Post ID: @OP+11GVTPUZ

16 replies (most recent on top)

Some smart folks have been saying that the core problem is large monolithic dies, which produce too many defects for today's and tomorrow's tiny nodes. IOW, need chiplets + IF, like AMD's approach. Charlie D., who started exposing the problems long ago, thinks Intel will not be competitive w/ server CPUs until 2H 2023 at the earliest...

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Post ID: @12qbj+11GVTPUZ

@8izf LTD leadership is under lot of pressure from CTO and exec office to force the yield VP to get his act together and demote the managers in question.

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Post ID: @Szim+11GVTPUZ

In certain HVM, they set unrealistic wafer out goals, which leads to most modules to want permission to run outside the control limits for CDs and defects. There needs to be someone to optimize the relation between yield, wafers, and sellable die.

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Post ID: @Jitu+11GVTPUZ

Due to bad promotions. Promoting people based on cast and regional feelings. Not based on talent. This is happing a lot in graphic division.

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Post ID: @xgxn+11GVTPUZ

Shameful that the company that once had the likes of Noyce and Grove can tolerate such mediocrity and dysfunction that too for so long..

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Post ID: @xgom+11GVTPUZ

A good engineer may not necessarily become a successful manager. Same is true of a good manager - no guarantee that person be successful as a VP which may require totally different skillset.

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Post ID: @ness+11GVTPUZ

@8zvs @8gor this is thought provoking. The claim is that 10nm mess is a temporary blip and a reset of design rules/process complexity has done the trick. But something does not quite add up in all of these claims. This might just explain everything. Why 14nm has supply issues, still after all these years of being fabbed. Why 10nm server is delayed and no desktop 10nm. Why 7nm is not in production yet.

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Post ID: @cprc+11GVTPUZ

If it looks like a duck, swims like a duck, and quacks like a duck, then it probably is a duck....

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Post ID: @8njf+11GVTPUZ

@7bnx It's probably something else. There has been high rate of attrition in yield. There are way too many managers, not enough good engineers left. 2 or more GLs per technology node doing practically same job function which is nonsense. Some of these yield GLs/managers have been underperforming for several years and few of them don't even follow Intel values.

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Post ID: @8gor+11GVTPUZ

“I am told a yield manager with very little experience got promoted to VP who has been in charge for last 5 years or so.. could be related to this.. this might be an issue of mismanagement”

That guy should have been IR and walked for the yield failures and miss on 14 and 10 as well as the 10nm Program manager.

What it tells you accountability stops at the high levels of Intel, why anyone wants to work their is beyond me

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Post ID: @8izf+11GVTPUZ

@11GVTPUZ That may not be the reason... it could be the high attrition rate in yield department.
The issue is there are way too many managers in yield - for some reason each node has been assigned 2 or more GLs for practically the same job function which is nonsensical.
Also some of these GLs have been poor performers for several years, with a few having significant behavioral issues as well.

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Post ID: @8zvs+11GVTPUZ

I am told a yield manager with very little experience got promoted to VP who has been in charge for last 5 years or so.. could be related to this.. this might be an issue of mismanagement

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Post ID: @7bnx+11GVTPUZ

Nope, @11GVTPUZ .. he was in charge of whole TMG. must be some VP under him.

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Post ID: @5csb+11GVTPUZ

Nobody on top is ever held accountable, duh.

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Post ID: @3hbl+11GVTPUZ

Sohail was. He devastated TMG - he laid me off too - and he finally got ousted. As an ex Process Engineer I can tell you the ship - i.e. the shrink - ran aground many years ago. The last truly profitable process was 1264, 1266 and 1268 were a torture and everything afterwards is a cover-up of an ongoing failure.

With the current nodes the yields of the past (800+ RISO etc) are gone for good. I know for a fact that the giants of today (tsmc and Samsung) run at much lower yields and still reap huge profits. Transitioning Intel into volume vs margin is a mammoth task that requires vision and balls but most of all runs against Intel culture of high yield. It just won't happen.

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Post ID: @1whq+11GVTPUZ

rhetorical question, no need to answer.

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Post ID: @1jvk+11GVTPUZ

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