Thread regarding Intel Corp. layoffs

Tears stream down your face
I promise you I will learn from my mistakes
Tears stream down your face, and I
Lights will guide you home
And ignite your bones
And I will try to fix you, INTEL

all dislikers ok Post ID: @2jnr+1jRMxTt4 don't want to fix Intel... lol

all external and internal EDA tools are based out of C/C++ with external scripting connection of "tcl".

cadence has propriety skil, synopsys and mentor they are somewhat on tcl but APIs are are custom for any tool so essentially this adds up to being lame when someone call industry standard -- lol

That's right. All that buggy spaghetti code Python scripting is more powerful than anything anybody else is using externally.

@1yke+1jRMxTt4 & @1qrp+1jRMxTt4

Intel's internal tools are way more powerful than external tools folks. I have worked on both. External tools charges hefty license fees for small features. The problem with designers is since the tool is block box it appears to them it is mature and doing everything fine. That even internal tools are/were doing. Now when you phase out and lay off people working on internal tools and innovation then offcourse you will see compromised support. that is exactly what i pointed out in my previous posts in this thread. The problem is that with tight-knit availability of designers and programmers you get leverage to excuse and point fingers at each other but not taking ownership.

You talk about AI/ML, that is exactly the level of innovation i am talking about. With external tools they charge license fees for these features and it is black-box ! While with in-house tools you have all the code (no re-invention of the wheel) and you can start your data extraction and feature creation with "automation/AI/ML/CV" with in-house tool code :-) cheers!

who else is in support of external tool and i will respond to each one of you? Remember don't ignore the title of this thread "How to fix Intel".

Just coz effing external executives came from AMD or Qualcomm used external tool which worked for them does not mean Intel's internal tools and especially teams and wonderful engineers who developed them were any bad. Effing phased all of them out or giving such direction. Such BS executives or anyone talking external tools need the boot.

All intel internal tool flows are a scam bureaucracy to create continual work for tool development empires. Substandard tools waste designers time. Support is minimal. Incremental improvements are made to provide barely functional TFM late in the project. Tool misses and findings are made late, detracting from other work to get product out on time. It seems tool developers can't provide a functional tool and want designers to feedback one small issue at a time so they can spend a bunch of time per small issue working in serial instead of having any quality control from the beginning. All tools need to be external. If some intel based wrapper is absolutely required, it needs to be heavily scrutinized and tested prior to rollout.

External customers are going to use the tools they are used to. Period. They will do the same design on 2 or 3 processes. Intel foundry needs to provide identical tools. Period. It's almost like I am hearing that internal tools could be somehow leveraged and monetized externally. I hope that is a joke. If you want to spend time reinventing the wheel, then work on AI/ML auto design i.e. computer program that spits out layout for new chip meeting all timing and design process rules.

@1hft+1jRMxTt4
if there is some industry standard then why Synopsys, Cadence, Mentor Graphics are selling different tools but which the same thing is done (Front End - Back End design/verification)?

So, i am of the view that it is lame to call things as industry standard.

let us talk about PDKs. every foundry has their own set of models. sure integration of the models and foundry standard cells should integrate well with all and any EDA tools.
So that level of integration was/is already there in EDA tools by Intel.

Moreover, the thread is about how to fix Intel.

Additionally, apple uses cadence while other use synopsys. does that mean cadence or synopsys is not industry standard?

simply because an executive has worked in the past with tools from synopsys or cadence or any other external and didn't work (or has experience) on Intel's tools does not mean Intel is not industry standard and that should never be the grounds to phase out internal EDA tool teams. period!

Moreover they didn't had Intel's semiconductor process experience and only knew about TSMC. That is where they started involving IDM. I do see some value in IDM 2.0 though. It is about integration of dies from different processes and that can lead to some goodness in semicondcutors.

Intel is somewhere between 3) and 4) but in reality way past the tipping point and all but assured of being irrelevant. 1) Hubris Born of Success, 2) Undisciplined Pursuit of More, 3) Denial of Risk and Peril, 4) Grasping for Salvation, and 5) Capitulation to Irrelevance or Death.Intel past the tipping point

IDM 2.0 is pure fantasy unless it supports broad external ecosystem of tools and flows... sure you could get a few companies or US DoD to sign up to Intel tools but that would never scale. This entire idea is beyond ridiculous.

Why should Intel be the industry standard?
Intel is behind on every vector.
It seems like the industry is getting along just fine with their tools.

It is a bit absurd to force internal Intel tooling on to folks that are tuned for TSMC and Samsung. It puts up another unnecessary barrier to using Intel fabs.

@yue+1jRMxTt4 ...u r still neglecting the fact, just because more people know a tool does not mean that should be industry standard. Sure to run the economy and have synopsys, cadence and mentor graphics lights' on ok.

Intel was in strong position to compete will all these companies when they were wanting to sell the process (ICF/IFS), they could have also sold CAD tools along with the process.

I have less experience with ASML. They have the fabrication technology so we can't get away with ASML. TSMC, Samsung all use ASML.

For design and verification, Intel must promote internal tools and not just external tools. External tools already have so many customers.

when did you join Intel? if you would like to share.

@jlj+1jRMxTt4

Isn’t that the problem though?
How can Intel be competitive in foundry without external tools?

Internal tops won’t cut it.

Intel needs foundry to survive. So put on your big boy pants and embrace external standards tools.

Semiconductor evolution is R&D thing. Some times things work some times don't, especially when company morale changes with layoffs and outside folks are given big paychecks and executive positions.

When outside folks came in at executive level they started phasing out internal innovative tools. The reason is obvious, they didn't worked on internal tools. They only worked on external tools which are black box for them and they believed its good- that's the problem. No outside person to be at higher position.
Only promote people from inside up coz they know exactly where things are. Outside people at higher level just ruin the momentum and morale by taking big paycheck and doing nothing. The mantra is believe in yourself and your peers.

Coming onto R&D, to keep Moore's law alive, they must experiment rigorously in stacking dies with TSV and interconnect. This is essentially next level of foveros. Once you have this technology in your pocket the apple will come to you , and also any one wanting to design and implement servers will surely come.

There are other things but I will just list the above for now as they are important.

Drop IDM 2.0 'flywheel for the future' as Pat calls it. It has less then 1% chance of success.

Take your suggestions to Pat. Email him.

Return to meritocracy, drop DEI

Design and apply a more objective way of evaluating talent (or the lack thereof). The 360 feedback method from the 90s wasn’t perfect, but when done properly the multi-sourced feedback and quantification-oriented eval forms worked OK. What was needed was a way to check against those collusive symbiotic pairs involving a boot-li---r subordinate/friend and a mediocrity-hiding manager.

When good talent can rise to areas of maximum impact, Intel benefits. What we have now is a system that has given us PEs that should have been fired 10 years ago.